Q3D Extractor by ANSYS is the industry-standard tool for parasitic extraction in superconducting quantum circuits. It computes the RLGC matrices—Resistance, Inductance, Conductance, and Capacitance—for arbitrary conductor geometries on layered substrates. These matrices are the primary inputs to circuit Hamiltonian models that predict qubit frequency, anharmonicity, coupling strengths, and coherence times.
This reference catalogues 47+ output parameters across 11 categories, with design rules derived from ANSYS Q3D documentation, IBM Quantum, Google AI Quantum, Krantz 2019, and Blais RMP 2021.
"Even small parasitic entries in the RLGC matrices shift qubit frequencies by 10–100 MHz. At 4K, aluminium and niobium become superconducting (R → 0), and kinetic inductance dominates. Normal-metal values from Q3D need temperature-dependent correction before use in the quantum Hamiltonian."
Parameter Category Overview
| Category | Parameters | Key Focus |
|---|---|---|
| 1. Resistance Matrix (R) | 5 | Ohmic loss, ground plane, via resistance |
| 2. Inductance Matrix (L) | 5 | Self/mutual inductance, kinetic inductance, Josephson L_J |
| 3. Conductance Matrix (G) | 4 | Substrate leakage, surface conductance |
| 4. Capacitance Matrix (C) | 6 | Qubit C_Σ, coupling caps, pad-to-ground parasitics |
| 5. Parasitic Resistance | 4 | JJ series R, shunt R, wirebond/bump R |
| 6. Parasitic Inductance | 4 | Wirebond L, lead L, slot L, package L |
| 7. Parasitic Capacitance | 5 | Trace-to-ground, substrate, inter-layer, fringe |
| 8. Electromagnetic Coupling | 6 | Q_ext, Q_int, Q_L, Z₀, ε_eff, coupling k² |
| 9. Substrate & Dielectric Loss | 5 | tan δ_bulk, tan δ_MA, tan δ_SA, tan δ_MS, SPR |
| 10. Skin Effect & Frequency-Dependent | 7 | Skin depth, R_ac/R_dc, propagation, RLGC per-unit-length |
| 11. Post-Processing Derived Outputs | 7 | E_C, E_J, g, χ, ζ, α, Γ_P |
1. Resistance Matrix (R)
The resistance matrix captures ohmic losses in the conductor network. At room temperature these values are used for fabrication quality assessment; at cryogenic temperatures Al becomes superconducting (R → 0) and the normal-state resistance R_N serves as a junction quality proxy.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 1 | DC Self-Resistance R_ii | < 1 mΩ | 0.5 – 5 mΩ | Al superconducting at 4K → R→0; use R_N·A as fab quality proxy |
| 2 | AC Self-Resistance (5–6 GHz) | < 5 mΩ (SC at 4K) | 5 – 20 mΩ | Skin effect: R_ac ∝ √f for bulk; ≈ R_dc for thin film < δ_s |
| 3 | Mutual Resistance R_ij | ≈ 0 | < 50 μΩ | Non-zero R_ij reveals overlapping ground return paths |
| 4 | Contact / Via Resistance | < 1 mΩ | 1 – 5 mΩ | Critical for multi-chip modules; oxidation is the main failure mode |
| 5 | Ground Plane Sheet Resistance | < 0.1 mΩ/sq | 0.1 – 0.5 mΩ/sq | Perforated ground planes add ~5–10 pH/sq for vortex pinning |
2. Inductance Matrix (L)
The inductance matrix sets the Josephson energy , which directly determines qubit frequency. Both geometric and kinetic inductance contributions must be accounted for in the design model.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 6 | Self-Inductance L_ii | 1 – 3 nH | 0.5 – 5 nH | L = L_geo + L_kinetic; target E_J/E_C ~ 50–80 |
| 7 | Mutual Inductance M_ij | < 5 pH (idle) | 5 – 50 pH | Intentional M_ij in flux-tunable couplers; unintentional sets ZZ floor |
| 8 | Geometric Inductance | < 0.5 pH/μm | 0.5 – 1 pH/μm | Slot cuts in ground plane drastically increase L_geo |
| 9 | Kinetic Inductance L_k | < 2 pH/sq (Al) | 1 – 10 pH/sq | High-L_k materials (NbTiN, TiN) used for KI qubit designs |
| 10 | Josephson Inductance L_J | 8 – 12 nH | 5 – 20 nH | The ONLY nonlinear element; L_J/C_Σ ratio sets anharmonicity |
3. Conductance Matrix (G)
Conductance matrix entries represent leakage current paths through the substrate and along surfaces. On high-resistivity silicon at 4K, these should be negligible—any measurable conductance indicates substrate quality or surface contamination issues.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 11 | Self-Conductance G_ii | < 0.1 nS | 0.1 – 1 nS | G_ii = 1/R_leak; appears as parallel resistance in resonator model |
| 12 | Substrate Bulk Conductance | < 0.01 nS | 0.01 – 0.5 nS | Use HR-Si (> 10 kΩ·cm) or sapphire; resistivity ↑ 100× at 4K |
| 13 | Surface / Interface Conductance | < 0.001 nS/μm | 0.001 – 0.05 nS/μm | Adsorbed water and organics increase G_surf; HF dip before cooldown |
| 14 | Mutual Conductance G_ij | < 1 pS | 1 – 50 pS | Non-zero in presence of surface water; fixed by clean or guard rings |
4. Capacitance Matrix (C)
The capacitance matrix is arguably the most important Q3D output for transmon design. The total qubit self-capacitance sets the charging energy , which determines the ratio, anharmonicity, and charge noise sensitivity.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 15 | Qubit Self-Capacitance C_Σ | 60 – 100 fF | 40 – 200 fF | C_Σ = Σ|C_ij| from Maxwell matrix; target E_J/E_C = 50–80 |
| 16 | Readout Resonator Cap C_r | 200 – 500 fF | 100 – 600 fF | Sets ω_r = 1/√(L_r C_r); target 6.5–8 GHz window |
| 17 | Qubit–Resonator Coupling C_g | 1 – 10 fF | 0.5 – 15 fF | g/2π target 50–150 MHz; Purcell decay ∝ (g/Δ)² × κ |
| 18 | Qubit–Qubit Coupling C_J | 0.5 – 5 fF | 0.2 – 10 fF | Modern heavy-hex lattice uses tunable couplers to cancel residual ZZ |
| 19 | Pad-to-Ground Parasitic Cap | < 5 fF | 1 – 20 fF | Each 1 fF of parasitic shifts f_qubit by ~10–30 MHz |
| 20 | Trace Mutual Capacitance C_ij | < 1 fF | 1 – 5 fF | Overlapping traces on adjacent layers is the primary source |
5. Parasitic Resistance
Parasitic resistances in the qubit circuit cause energy dissipation that directly limits T₁. At millikelvin temperatures, the dominant sources are quasiparticle conductance in JJ leads and substrate leakage through lithography residues.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 21 | Series JJ Parasitic R | < 0.01 Ω | 0.01 – 0.1 Ω | Quasiparticle poisoning transiently raises R_ser; shielding critical |
| 22 | Shunt Parasitic R (R_p) | > 1 MΩ | 100 kΩ – 1 MΩ | Substrate residues from lithography most common cause; O₂ plasma clean |
| 23 | Wirebond / Bump R | < 5 mΩ | 2 – 20 mΩ | Au–Au bonds have lower R than Al wedge bonds |
| 24 | Metal Interface Contact R | < 1 mΩ | 1 – 10 mΩ | Native Al₂O₃ must be removed by Ar ion milling before deposition |
6. Parasitic Inductance
Parasitic inductance creates impedance discontinuities that shift resonator frequencies, cause reflections, and introduce AC flux errors in bias lines. Flip-chip integration reduces wirebond inductance by 10–20× compared to traditional wire bonding.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 25 | Wirebond / Bump L | < 1 nH | 0.3 – 3 nH | Flip-chip In bumps reduce to ~0.1 nH; key for 3D scaling |
| 26 | Control Line Lead L | < 100 pH | 50 – 500 pH | Long coax adds 1–10 nH; de-embed by calibration |
| 27 | Ground Plane Slot L | < 1 pH/sq | 1 – 5 pH/sq | Vortex-pinning holes add ~5–10 pH/sq but necessary at B > 0 |
| 28 | Package / Board L | < 0.5 nH | 0.5 – 2 nH | SMP connectors (< 0.3 nH) preferred over SMA (~0.5–1 nH) for cryo |
7. Parasitic Capacitance
Parasitic capacitances shift qubit frequencies from design targets and create unwanted coupling paths. Fringe capacitance at conductor edges accounts for 30–50% of total coupling capacitance in typical transmon designs.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 29 | Trace-to-Ground C | 0.1 – 0.4 fF/μm | 0.1 – 1 fF/μm | Sets CPW Z₀ = √(L/C); target 50 Ω |
| 30 | Pad-to-Substrate C | < 10 fF | 5 – 30 fF | Thinning substrate 500→200 μm reduces by ~2.5× |
| 31 | Inter-Layer Cap (3D) | < 5 fF | 1 – 20 fF | Bump height variation (σ ~ 1–2 μm) causes ~0.5–1 fF spread |
| 32 | Fringe Capacitance | 0.02 – 0.1 fF/μm | 0.05 – 0.5 fF/μm | ~30–50% of C_g comes from fringe; underestimating shifts f by 50+ MHz |
| 33 | Wirebond Pad Parasitic Cap | < 50 fF | 20 – 150 fF | Reducing pad 150→80 μm cuts C by ~2.5× with no yield penalty |
8. Electromagnetic Coupling
Coupling parameters bridge the gap between Q3D parasitic extraction and the quantum Hamiltonian. External quality factor Q_ext sets readout bandwidth, while Z₀ and ε_eff determine transmission line geometry for target frequencies.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 34 | External Quality Factor Q_ext | 5×10³ – 2×10⁴ | 10³ – 10⁵ | T₁_Purcell = Q_ext/ω_r × (Δ/g)²; Purcell filter relaxes trade-off |
| 35 | Internal Quality Factor Q_int | > 10⁶ | 10⁵ – 10⁶ | Requires HR-Si or sapphire, clean deposition, minimal surface TLS |
| 36 | Loaded Quality Factor Q_L | 10³ – 10⁴ | 500 – 2×10⁴ | In practice Q_L ≈ Q_ext when Q_int ≫ Q_ext (under-coupled limit) |
| 37 | CPW Characteristic Impedance Z₀ | 50 Ω ± 1 Ω | 45 – 55 Ω | On 500 μm Si: 10 μm trace / 6 μm gap → Z₀ ≈ 50 Ω |
| 38 | Effective Permittivity ε_eff | 6.0 – 6.5 | 5.5 – 7.0 | ε_eff ≈ (1 + εr)/2 for CPW in air on substrate |
| 39 | Coupling Coefficient k² | 1 – 10 ×10⁻³ | 0.5 – 20 ×10⁻³ | Etch depth variation of 0.1 μm → δk²/k² ~ 5% |
9. Substrate & Dielectric Loss
Dielectric loss is the dominant T₁ limiter in planar transmon designs. The loss tangent at each interface (metal-air, substrate-air, metal-substrate) multiplied by the surface participation ratio determines the contribution to qubit decay.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 40 | Substrate Bulk Loss tan δ_bulk | < 10⁻⁶ | 10⁻⁶ – 10⁻⁵ | tan δ improves by 10–100× on cooling from 300K to 4K |
| 41 | Metal-Air Interface tan δ_MA | < 10⁻³ | 10⁻³ – 5×10⁻³ | Dominant T₁ source in planar transmons; HF vapor clean reduces by 10× |
| 42 | Substrate-Air Interface tan δ_SA | < 5×10⁻⁴ | 5×10⁻⁴ – 5×10⁻³ | H-passivated Si surface (HF dip) shows 5× lower tan δ_SA |
| 43 | Metal-Substrate Interface tan δ_MS | < 5×10⁻³ | 5×10⁻³ – 10⁻² | Amorphous SiOx layer (1–2 nm) is primary TLS host; HF clean removes it |
| 44 | Surface Participation Ratio (SPR) | < 5 ppm | 5 – 50 ppm | 1/Q_TLS = Σ pᵢ × tan δᵢ; SPR is the design lever, tan δ is the material lever |
10. Skin Effect & Frequency-Dependent Parameters
These parameters characterise the frequency-dependent behaviour of the conductor network. At cryogenic temperatures the skin depth concept is replaced by the London penetration depth λ_L, but room-temperature Q3D values remain essential for pre-cooldown verification.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 45 | Skin Depth at 5 GHz (δ_s) | 0.5 – 2 μm | 0.5 – 3 μm | At 4K SC: replaced by London λ_L ≈ 60–163 nm for thin-film Al |
| 46 | AC/DC Resistance Ratio | ≈ 1.0 (thin film) | 1.0 – 2.0 | Thin-film qubits (100–200 nm) operate below skin-depth limit |
| 47 | Propagation Constant γ | α < 0.1 dB/m | α 0.1 – 1 dB/m | For interconnects > 10 mm even 0.1 dB/m causes measurable loss |
| 48 | Phase Velocity v_ph | 1.2 – 1.4 ×10⁸ m/s | 1.0 – 1.6 ×10⁸ m/s | λ/4 at 7 GHz on Si ≈ 4.25 mm |
| 49 | Per-Unit-Length R' | < 0.1 mΩ/mm | 0.1 – 2 mΩ/mm | At 4K Al is SC: R' → 0 below T_c |
| 50 | Per-Unit-Length L' | 0.3 – 0.5 nH/mm | 0.2 – 0.8 nH/mm | L'_kinetic small for Al (~0.01–0.05 nH/mm) |
| 51 | Per-Unit-Length C' | 0.1 – 0.2 pF/mm | 0.05 – 0.3 pF/mm | Check: Z₀ = √(L'/C') ≈ 50 Ω as consistency verification |
11. Post-Processing Derived Outputs
These parameters are computed from the raw RLGC matrices and represent the quantum Hamiltonian parameters that ultimately determine device performance. The standard design loop is: Q3D → Hamiltonian → Optimise → Iterate.
| ID | Parameter | Ideal | Good Range | Key Design Note |
|---|---|---|---|---|
| 52 | Charging Energy | 200 – 350 MHz | 150 – 400 MHz | ; critical Hamiltonian input |
| 53 | Josephson Energy | 10 – 30 GHz | 5 – 50 GHz | tunable via flux in split-junction transmons |
| 54 | Qubit–Resonator Coupling | 50 – 150 MHz | 20 – 300 MHz | ensures dispersive limit; |
| 55 | Dispersive Shift | 1 – 5 MHz | 0.5 – 10 MHz | Single-shot readout SNR ; Purcell filter allows larger |
| 56 | ZZ Coupling Rate | < 10 kHz | 10 – 50 kHz | Central challenge of transmon scaling; tunable coupler pushes |
| 57 | Anharmonicity | −300 to −150 MHz | −350 to −100 MHz | Gate BW to avoid leakage; |
| 58 | Purcell Decay Rate | < 1 kHz | 1 – 10 kHz | Purcell filter reduces by 10–100× without affecting readout |
Key Takeaways
- RLGC Matrices from Q3D are the primary inputs to circuit Hamiltonian models. Even small parasitic entries shift qubit frequencies by 10–100 MHz.
- Superconducting Regime: At 4K, Al and Nb become superconducting → R → 0, L_kinetic dominates. Normal-metal values from Q3D need temperature-dependent correction.
- Surface Participation: SPR × tan δ controls T₁. Design rule: minimise p_MA below 5 ppm via thick metal, wider CPW gaps, and clean interfaces.
- Derived Outputs: , , , , , are all computed from Q3D matrices. Iterating Q3D → Hamiltonian → Optimise is the standard qubit design loop.
Sources: ANSYS Q3D · IBM Quantum · Google AI · Krantz 2019 · Blais RMP 2021 · Q3D Analysis — QuantumChipGen Reference Deck