Resistance Matrix (R)

Resistance outputs describe DC and AC conductor losses. For superconducting layouts,

use these values as fabrication and normal-state quality checks before low-temperature correction.

#	Parameter	Symbol / Unit	Extraction Method	Typical Q3D Value	Ideal / Optimal	Good Range	Worst Case	Why It Matters	Key Design Note
1	DC Self-Resistance (R_ii)	R_ii / mΩ	DC sweep; sheet-resistance extraction	0.5 – 5 mΩ	< 1 mΩ	0.5 – 5 mΩ	> 50 mΩ	Ohmic loss in qubit loop raises thermal noise floor and damps resonator Q factor	Al becomes superconducting at 4K → R→0; use RₙA as fabrication quality proxy
2	AC Self-Resistance at 5–6 GHz	R_ac / mΩ	HFSS/Q3D surface impedance model	2 – 20 mΩ	< 5 mΩ (superconducting at 4K)	5 – 20 mΩ	> 100 mΩ	Values shown apply to normal-metal (room-temp) modeling; at cryogenic temp Al is superconducting (R→0). For non-SC segments or pre-cooldown checks, normal-metal losses degrade quality factor Q.	Skin effect sets frequency dependence: R_ac ∝ √f for bulk, ≈ R_dc for thin film < δ_s. These ranges are room-temperature values; at mK, SC Al gives R_ac → 0.
3	Mutual Resistance (R_ij)	R_ij / μΩ	Full R matrix extraction in Q3D	< 10 μΩ	≈ 0 (no shared current path)	< 50 μΩ	> 500 μΩ	Shared resistive coupling between conductors indicates galvanic crosstalk	Non-zero R_ij reveals overlapping ground return paths; fix by isolating ground planes
4	Contact / Via Resistance	R_via / mΩ	TDR or DC 4-probe; Q3D via model	< 2 mΩ per via	< 1 mΩ (superconducting through-Si)	1 – 5 mΩ	> 20 mΩ	Resistance at layer transitions limits Q in 3D integration and flip-chip assemblies	Critical for multi-chip modules; oxidation or poor metal contact is the main failure mode
5	Ground Plane Sheet Resistance	R_sh / mΩ/sq	4-probe measurement; Q3D bulk conductivity input	< 0.1 mΩ/sq (Al at 4K)	< 0.1 mΩ/sq	0.1 – 0.5 mΩ/sq	> 5 mΩ/sq	High R_sh creates inductive ground return paths and shifts mode frequencies across the chip	Perforated ground planes for vortex pinning add ~5–10 pH/sq inductance per square